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Q.

Cache Memory is implemented using the DRAM chips.

A

True

B

False

C

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MCQ

1.

In pipelining the task which requires the least time is performed first.

A

True

B

False

C

n>

Discussion

MCQ

2.

Which of the following is an efficient method of cache updating?

A

Snoopy writes

B

Write through

C

Write within

D

Buffered write

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3.

What is the high speed memory between the main memory and the CPU called?

A

Register Memory

B

Cache Memory

C

Storage Memory

D

Virtual Memory

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4.

The transfer between CPU and Cache is ______________

A

Block transfer

B

Word transfer

C

Set transfer

D

Associative transfer

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5.

The contention for the usage of a hardware device is called ______

A

Structural hazard

B

Stalk

C

Deadlock

D

None of the mentioned

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