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Q.

DMA is used for __________

A

High speed devices

B

Low speed devices

C

Utilizing CPU cycles

D

All of the mentioned

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MCQ

1.

The host sets _____ bit when a command is available for the controller to execute.

A

write

B

status

C

command-ready

D

control

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MCQ

2.

What is an interrupt vector?

A

It is an address that is indexed to an interrupt handler

B

It is a unique device number that is indexed by an address

C

It is a unique identity given to an interrupt

D

None of the mentioned

Discussion

MCQ

3.

The hardware mechanism that allows a device to notify the CPU is called _______

A

polling

B

interrupt

C

driver

D

controlling

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4.

Device drivers are implemented to interface ____________

A

character devices

B

block devices

C

network devices

D

all of the mentioned

Discussion

MCQ

5.

If the number of cycles spent busy - waiting is not excessive, then ____________

A

interrupt driven I/O is more efficient than programmed I/O

B

programmed I/O is more efficient than interrupt driven I/O

C

both programmed and interrupt driven I/O are equally efficient

D

none of the mentioned

Discussion

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