Question Discussion & Solution

MCQ

A processor performing fetch or decoding of different instruction during the execution of another instruction is called ______ .

Super-scaling

Pipe-lining

Parallel Computation

None of these

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The internal Components of the processor are connected by _______ .

Processor intra-connectivity circuitry

Processor bus

Memory bus

Rambus

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Set on less than has the ALU control lines

1100

1010

1101

111

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The clock rate of the processor can be improved by

Improving the IC technology of the logic circuits

Reducing the amount of processing done in one step

By using overclocking method

All of the above

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MCQ

A processor performing fetch or decoding of different instruction during the execution of another instruction is called ______ .

Super-scaling

Pipe-lining

Parallel Computation

None of these

Discussion

NAT

A simple ALU is designed to perform 4 distinct operations: Addition, Subtraction, Logical AND, and Logical OR. Assuming a standard encoding scheme for operation selection, how many control lines are minimally required to select one of these four operations for the ALU?

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Instruction set architecture

Cache Memory and Pipelining

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Cache Memory and its design

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Subroutines and Nesting

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