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Q.

In pipelining the task which requires the least time is performed first.

A

True

B

False

C

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MCQ

1.

The transfer between CPU and Cache is ______________

A

Block transfer

B

Word transfer

C

Set transfer

D

Associative transfer

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2.

The fetch and execution cycles are interleaved with the help of ________

A

Modification in processor architecture

B

Clock

C

Special unit

D

Control unit

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3.

The pipelining process is also called as ______

A

Superscalar operation

B

Assembly line operation

C

Von Neumann cycle

D

None of the mentioned

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4.

The contention for the usage of a hardware device is called ______

A

Structural hazard

B

Stalk

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Deadlock

D

None of the mentioned

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5.

LRU stands for ___________

A

Low Rate Usage

B

Least Rate Usage

C

Least Recently Used

D

Low Required Usage

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